--TD 4.1.1 Initial Voltage Test
local function scriptContinue()
    --[[第三步:对于支持Source模式的PUT:A、CVS进入Unattached.SRC状态  B、等待750ms  C、CVS验证PUT不提供Vbus [TD.4.1.1.V.8]
    D、对于PUT_R(带有Ra下拉电阻的设备):i. CVS进入Disabled状态,持续750ms  ii. CVS将一个CC引脚与Ra(下拉电阻)连接  iii. 等待750ms
    iv. CVS验证PUT不提供Vbus [TD.4.1.1.V.9]  v. CVS验证PUT不提供VCONN [TD.4.1.1.V.10]  E、CVS进入Disabled状态,持续750ms
    原文:For a Source-capable PUT:a. CVS transitions to Unattached.SRC state.  b. Wait 750ms.  c. CVS verifies PUT does not source VBUS (4.5.1.2#2) [TD.4.1.1.V.8]
    d. For a PUT_R:i. CVS transitions to Disabled for 750ms.  ii. CVS terminates 1 CC pin with Ra.  iii. Wait 750ms.
    iv. CVS verifies PUT does not source VBUS [TD.4.1.1.V.9]  v. CVS verifies PUT does not source VCONN (4.5.2.2.6.2#3)[TD.4.1.1.V.10]
    e. CVS transitions to Disabled for 750ms. ]]
    if Type_C_State_Machine == 0 then                  --支持Source
        busilib.setUsbCcs(CCS.Unattached)              --A:设置为Unattached.SRC
        baselib.delay(750)                             --B:维持750ms
        VBUS = busilib.GetADC(ADC.VBUS, 4)             --C:CVS验证PUT不提供Vbus
        if VBUS > 0.8 then
            baselib.report(0x00, "TD.4.1.1.V.8 fail.")
        else
            baselib.report(0x00, "TD.4.1.1.V.8 pass.")
        end
        --第2.D步:
        busilib.setUsbCcs(CCS.Disabled)   
        baselib.delay(750)
        busilib.SetSwitchState(SW.CC2_RA, 1)           --这里CC2连Ra
        baselib.delay(750)
        VBUS = busilib.GetADC(ADC.VBUS, 4)             --验证PUT在CC引脚连接Ra时不会提供Vbus
        if VBUS > 0.8 then
            baselib.report(0x00, "TD.4.1.1.V.9 fail.")
        else
            baselib.report(0x00, "TD.4.1.1.V.9 pass.")
        end
        local VCC1 = busilib.GetADC(ADC.CC1, 4)        --CVS验证PUT不提供VCONN
        local VCC2 = busilib.GetADC(ADC.CC2, 4)
        baselib.report(0x00, "CC1 is " .. VCC1 .. "mV, and CC2 is " .. VCC2 .. "mV.")
        if VCC1 > 275 or VCC2 > 275 then
            baselib.report(0x00, "TD4.1.1.V.10 fail.")
        else
            baselib.report(0x00, "TD4.1.1.V.10 pass.")
        end
        busilib.setUsbCcs(CCS.Disabled)                --CVS进入Disabled状态,持续750ms 
        baselib.delay(750)
    end
    --[[第四步:对于支持Sink模式和SNKAS的PUT:A、CVS进入Unattached.SNK状态,持续50ms  B、CVS进入Unattached.Accessory状态,持续50ms
    C、CVS进入Unattached.SNK状态,持续50ms  D、CVS进入Disabled状态,持续750ms
    原文:For a Sink and SNKAS PUT:a. CVS transitions to Unattached.SNK state for 50ms  b. CVS transitions to Unattached.Accessory state for 50ms
    c. CVS transitions to Unattached.SNK state for 50ms  d. CVS transitions to Disabled for 750ms.]]
    --疑问:这一步什么都不验证吗?
    if Type_C_State_Machine == 1 then                  --Type_C_State_Machine是SNK
        busilib.setUsbRole(ROLE.Sink)                  --A、CVS进入Unattached.SNK状态,持续50ms
        busilib.setUsbCcs(CCS.Unattached)  
        baselib.delay(50)  
        --------------------------------------------   --B、CVS进入Unattached.Accessory状态,持续50ms      还没加先不写
        busilib.setUsbRole(ROLE.Sink)                  --C、CVS进入Unattached.SNK状态,持续50ms
        baselib.delay(50)      
        busilib.setUsbCcs(CCS.Unattached)              --D、CVS进入Disabled状态,持续750ms
        baselib.delay(750) 
    end  
    --[[第五步:对于支持Sink模式(DRP应该也算在内)的PUT:A、CVS应用USB 3.1/2.0 DFP终端  B、等待2秒  C、CVS验证PUT未应用D+上拉或SS终端 [TD.4.1.1.V.11]
    原文:For a Sink-capable PUT:a. CVS applies USB 3.1/2.0 DFP terminations  b. Wait 2s  c. CVS verifies PUT did not apply D+ pull-up or SS terminations [TD.4.1.1.V.11] ]]  
    if Type_C_State_Machine == 2 or Type_C_State_Machine == 1 then
    --不会,需要讲解与探讨   
    end
    --第六步:CVS在Vbus和CC引脚之间应用53.2kΩ电阻        (原文:CVS applies 53.2k resistance from Vbus to CC pin.)
    busilib.SetSwitchState(SW.CC1_RP_0A5, 1)
    --第七步:CVS验证PUT在tCCDebounce时间内不提供Vbus    (原文:CVS verifies PUT does not source Vbus after tCCDebounce. [TD.4.1.1.V.12])
    local transVbus = busilib.newTrans4ad(4, ADC.VBUS, {800})          --新建ADC状态翻译器,监控VBUS有没有出现0.8V
    local monitorVbus = busilib.newMonitor(TMD.CHECK_POINT, transVbus, {1}, {0}, {0})
    baselib.delay(100) 
    if busilib.getMonitorResult(monitorVbus) ~= 1 then                 --出现1说明超过0.8V,即PUT加载Vbus
        baselib.report(0x00, "TD.4.1.1.V.12 pass.")
    else
        baselib.report(0x00, "TD.4.1.1.V.12 fail.")
    end
    --删除监控器
    busilib.deleteMonitor(monitorVbus)
    busilib.deleteTrans(transVbus)
    --第八步:CVS移除Vbus和CC引脚之间的53.2kΩ电阻        (原文:CVS removes 53.2k resistance from Vbus to CC pin.)
    busilib.SetSwitchState(SW.CC1_RP_0A5, 0)
    --第九步:CVS提供Vbus,持续1秒                        (原文:CVS presents VBUS for 1s.)
    busilib.SetDAP(DAP.VBUS, 8100)                     --这里设置DAP阻值,让VBUS为5V
    baselib.delay(1000)                                --疑问:1s后要关掉Vbus吗???
    --第十步:该测试必须在DUT进行USB-IF互操作性测试之前完成,确保设备在进入更复杂的互操作性测试之前,已经通过了初始电压测试
    --(原文:This test must be performed before the DUT is tested at the USB-IF Interoperability Test Suites)
    --疑问:第十步需要什么操作???
end

baselib.report(0x00, "TD4.1.1 beginning.")             --report:参数1是上报的消息的MsgType字段,参数2是content内容
--第一步:查看PUT是否提供Vbus                            (原文:If the PUT sources Vbus:)
busilib.SetSwitchState(SW.VBUS_I_CAL, 1)               --打开VBus上的下拉电阻
local VBUS = busilib.GetADC(ADC.VBUS, 4)  
local Ispass = true                                    --用于1.b步.(原文:If the VIF fields in step 2.a are all verified, the test is over. The only other applicable Type_C_Functional test is TD 4.9.2)
--疑问:The only other applicable Type_C_Functional test is TD 4.9.2这句在这是什么意思?
if VBUS > 0.8 then                                     --说明PUT加载了Vbus
    --[[1.a步CVS验证以下字段
    CVS Verifies: i. VIF field USB_PD_Support is set to NO [TD.4.1.1.V.2]      ii. VIF field Type_C_State_Machine is set to SRC [TD.4.1.1.V.3]
                  iii. VIF field Captive_Cable is set to YES [TD.4.1.1.V.4]    iv. VIF field Type_C_Can_Act_As_Host is set to NO [TD.4.1.1.V.5]
                  v. VIF field Type_C_Can_Act_As_Device is set to NO [TD.4.1.1.V.6] ]]
    baselib.report(0x00, "PUT sources Vbus")
    --i. VIF field USB_PD_Support is set to NO [TD.4.1.1.V.2]
    if USB_PD_Support == false then
        baselib.report(0x00, "TD.4.1.1.V.2 pass.")
    else
        baselib.report(0x00, "TD.4.1.1.V.2 fail.")
        Ispass = false
    end
    --ii. VIF field Type_C_State_Machine is set to SRC [TD.4.1.1.V.3]
    if Type_C_State_Machine == 0 then                  --0代表SRC,1代表SNK,2代表DRP
        baselib.report(0x00, "TD.4.1.1.V.3 pass.")
    else
        baselib.report(0x00, "TD.4.1.1.V.3 fail.")
        Ispass = false
    end
    --iii. VIF field Captive_Cable is set to YES [TD.4.1.1.V.4]
    if Captive_Cable == true then
        baselib.report(0x00, "TD.4.1.1.V.4 pass.")
    else
        baselib.report(0x00, "TD.4.1.1.V.4 fail.")
        Ispass = false
    end
    --iv. VIF field Type_C_Can_Act_As_Host is set to NO [TD.4.1.1.V.5]
    if Type_C_Can_Act_As_Host == false then
        baselib.report(0x00, "TD.4.1.1.V.5 pass.")
    else
        baselib.report(0x00, "TD.4.1.1.V.5 fail.")
        Ispass = false
    end
    --v. VIF field Type_C_Can_Act_As_Device is set to NO [TD.4.1.1.V.6]

    if Type_C_Can_Act_As_Decice == false then
        baselib.report(0x00, "TD.4.1.1.V.6 pass.")
    else
        baselib.report(0x00, "TD.4.1.1.V.6 fail.")
        Ispass = false
    end
    --第1.b步如果上述VIF字段验证通过,测试结束,否则检查点fail
    if Ispass ~=true then
        baselib.report(0x00, "TD.4.1.1.V.7 fail.")
        scriptContinue() 
    end
--第二步:CVS验证VBUS引脚不提供Vbus                      (原文:CVS verifies that the VBUS pins do not source VBUS (4.5.2.2.1#1) [TD.4.1.1.V.7])
else                                                   --没有加载Vbus
    baselib.report(0x00, "TD.4.1.1.V.7 pass.")
    scriptContinue()
end
baselib.report(0x00, "Demo is done here.")
baselib.report(0x07, "\x04")